L40 半导体分立器件综合 标准查询与下载

DLA SMD-5962-87554 REV E-2004 硅单块 晶体管-晶体管逻辑电路兼容输入,双8选1译码器或多路分解器,互补金属氧化物半导体数字微型电路

This drawing documents two product assurance class levels consisting of high reliability (device classes B, Q and M), and space application (device classes S and V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

MICROCIRCUIT, DIGITAL, CMOS, 1-OF-8 DECODER/DEMULTIPLEXER, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON

DIN EN 60191-6-10:2004 半导体器件的机械标准化.第6-10部分:表面安装半导体器件封装外形图绘制的一般原则.P-VSON的尺寸

This part of DIN EN 60191 provides the common outline drawings and dimensions for all types of structures and composed materials of plastic very thin small outline non-lead package (P-VSON).

Mechanical standardization of semiconductor devices - Part 6-10: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Dimensions of P-VSON (IEC 60191-6-10:2003); German version EN 60191-6-10:2003

DLA SMD-5962-89684 REV A-2004 硅单片,高压高电流达林顿晶体管阵列,线性微型电路

This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.

MICROCIRCUIT, LINEAR, HIGH-VOLTAGE, HIGH-CURRENT, DARLINGTON TRANSISTOR ARRAYS, MONOLITHIC SILICON

JEDEC JEP148-2004 基于故障风险的物理性和选择评估的半导体器件的鉴定

The penetration of semiconductor products into an increasing variety of application segments together with the economic forces of cost and time-to-market require efficient qualification concepts. This requirement influences the organization of the qualification process in conjunction with the development / innovation process as well as the qualification methodology. Proactive practices such as advance quality planning, "incremental qualification" and confirmation during development have to be practiced in order to meet time to market goals. Results of theses activities including the use of further available knowledge will be the basis for the qualification as evidence for the readiness of the product for the market.

Reliability Qualification of Semiconductor Devices Based on Physics of Failure Risk and Opportunity Assessment

DIN EN 60749-25:2004 半导体器件.机械和气候试验方法.第25部分:温度循环

This part of DIN EN 60749 provides a test procedure for determining the ability of smiconductor devices and components and/or board assemblies to withstand mechanical stresses induced by alternating high and low temperature extremen. Permanent changes in electrical and/or physical characteristics can result from these stresses. This test applies to single, dual and triple chamber temperature cycling and covers component and solder interconnection testing.#,,#

Semiconductor devices - Mechanical and climatic test methods - Part 25: Temperature cycling (IEC 60749-25:2003); German version EN 60749-25:2003

BS EN 60191-6-10:2003 半导体器件的机械标准化.表面安装半导体器件封装外形图绘制的一般规则.P-VSON的尺寸

This part of IEC 60191 provides the common outline drawings and dimensions for all types of structures and composed materials of plastic very thin small outline non-lead package (hereinafter called P-VSON).

Mechanical standardization of semiconductor devices - Part 6-10:General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Dimensions of P-VSON

DLA SMD-5962-95745 REV D-2004 高速抗辐射互补金属氧化物半导体,非倒相八角母线接收器,晶体管兼容输入硅单片电路线型微电路

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V) and for appropriate satellite and similar applications (device class T).

MICROCIRCUIT, DIGITAL, RADIATION HARDENED, HIGH SPEED CMOS, NON-INVERTING OCTAL BUS TRANSCEIVER WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON

BS EN 60749-29:2004 半导体器件.机械和气候试验方法.闭锁试验

Semiconductor devices - Mechanical and climatic test methods - Latch-up test

BS EN 60749-29:2003 半导体器件.机械和气候试验方法.闭锁试验

This part of IEC 60749 covers the l-test and the overvoltage latch-up testing of integrated circuits. This test is classified as destructive. The purpose of this test is to establish a method for determining integrated circuit (IC) latch-up characteristics and to define latch-up failure criteria. Latch-up characteristics are used in determining product reliability and minimizing "No Trouble Found" (NTF) and "Electrical Overstress" (EOS) failures due to latch-up. This test method is primarily applicable to CMOS devices. Applicability to other technologies must be established. In this part of IEC 60749 latch-up is not related to a specific mechanism but is an electrical failure characteristic that occurs when a device is subjected to this test method. The classification of latch-up as a function of temperature is defined in 2.1 and the failure level criteria are defined in 2.10

Semiconductor devices - Mechanical and climatic test methods - Part 29:Latch-up test

BS EN 60747-15:2004 半导体分立器件.绝缘的功率半导体器件

This part of IEC 60747 gives the product specific standards, requirements and test methods for isolated power semiconductor devices. These requirements are added to those given in other parts of IEC 60747, IEC 60748 and IEC 60749 for the corresponding non-isolated power devices.

Discrete semiconductor devices. Isolated power semiconductor devices

IEC 60191-2:1966/AMD10:2004 半导体器件的机械标准化.第2部分:尺寸.修改件10

This is Amendment 10 to IEC 60191-2-2004 (Mechanical standardization of semiconductor devices - Part 2: Dimensions)

Mechanical standardization of semiconductor devices - Part 2: Dimensions; Amendment 10

IEC 60749-34:2004 半导体器件.机械和气候试验方法.第34部分:电力循环

Semiconductor devices - Mechanical and climatic test methods - Part 34: Power cycling

IEC 60749-21:2004 半导体器件.机械和气候试验方法.第21部分:可焊性

Semiconductor devices - Mechanical and climatic test methods - Part 21: Solderability

IEC 60749-24:2004 半导体器件.机械和气候试验方法.第24部分:加速抗湿性.无偏HAST

Semiconductor devices - Mechanical and climatic test methods - Part 24: Accelerated moisture resistance - Unbiased HAST (Edition 1.0; Replaces IEC PAS 62336:2002)

IEC 60749-33:2004 半导体器件.机械和气候试验方法.第33部分:加速抗湿.无偏压热器

Scope and object The unbiased autoclave test is performed to evaluate the moisture resistance integrity of nonhermetic packaged solid-state devices using moisture condensing or moisture saturated steam environments. It is a highly accelerated test which employs conditions of pressure@ humidity and temperature under condensing conditions to accelerate moisture penetration through the external protective material (encapsulant or seal) or along the interface between the external protective material and the metallic conductors passing through it. This test is used to identify failure mechanisms internal to the package and is destructive.

Semiconductor devices - Mechanical and climatic test methods - Part 33: Accelerated moisture resistance - Unbiased autoclave (Edition 1.0; Replaces IEC PAS 62172:2000)

DLA SMD-5962-95637 REV B-2004 数字反射高速互补金属氧化物半导体,四重2输入与非晶体管兼容输入硅单片电路线型微电路

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN).

MICROCIRCUIT, DIGITAL, RADIATION HARDENED, HIGH SPEED CMOS, QUAD 2-INPUT NAND GATE, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON

IEC 60749-23:2004 半导体器件.机械和气候试验方法.第23部分:高温操作寿命

This test is used to determine the effects of bias conditions and temperature on solid state devices over time. It simulates the device operating condition in an accelerated way, and is primarily used for device qualification and reliability monitoring.

Semiconductor devices - Mechanical and climatic test methods - Part 23: High temperature operating life

DLA SMD-5962-91531 REV A-2004 硅单块 六进制晶体管晶体管逻辑电路到发射极耦合逻辑的翻译器,发射极耦合逻辑,数字微型电路

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M)and space application (device class V).

MICROCIRCUIT, DIGITAL, ECL, HEX ECL-TO-TTL TRANSLATOR, MONOLITHIC SILICON

DIN EN 60191-6-4:2004 半导体器件的机械标准化.第6-4部分:表面安装半导体器件封装外形图绘制的一般规则.焊球网格阵列(BGA)封装尺寸的测量方法

This part of DIN EN 60191 covers the requirements for the measuring methods of ball grid array (BGA) dimensions.

Mechanical standardization of semiconductor devices - Part 6-4: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of ball grid array (BGA) (IEC 60191-6-4:2003)

DLA SMD-5962-91722 REV D-2004 硅单块 晶体管-晶体管逻辑电路兼容输入,非同步重设置,四比特可重设置二进制计数器,高级互补金属氧化物半导体,数字微型电路

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M)and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

MICROCIRCUIT, DIGITAL, ADVANCED CMOS, 4-BIT PRESETTABLE BINARY COUNTER, ASYNCHRONOUS RESET, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON