SAE J2628-2018
SAE J 2628-2018

Characterization@ Conducted Immunity

SAE J2628-2018 发布历史

"The methods included in this document are: a. Voltage-Temperature Design Margins. b. Voltage Interruptions and Transients. c. Voltage Dropouts and Dips. d. Current Draw Under a Number of Conditions. e. Switch Input Noise These methods are best applied during the Development stage but can be used at all stages (e.g.@ Pre-Qualification@ Qualification or Conformity). Measurement Philosophy The main issues associated with contemporary mature electronic systems (non mechanical) are: a. Requirements not properly defined (e.g.@ functionality@ environment). b. System interfaces. c. Trouble Not Indicated (TNI). A typical validation test program may not sufficiently address these issues. Some common deficiencies are: a. Requirements validation - tested under ideal conditions (e.g.@ room temp@ bench power supply). b. Environmental (non EMC) testing mainly wear-out oriented. c. EMC testing not realistic - room temp only@ idealized noise signals. d. System interactions@ interfaces and degradation not sufficiently addressed. This document addresses much of the above using relatively simple and low cost techniques which: a. Requires minimal lab facilities. b. Allows maximum flexibility to experiment early in the program. c. Allows sufficient reaction time to react to potential issues. d. Stage where failures are good (maximizes information). One main issue addressed here is Conducted Immunity (CI). That aspect of Electromagnetic Compatibility (EMC) has the highest potential for warranty and customer satisfaction issues. However@ traditional validation testing for CI has major limitations. Specifically@ CI testing is most often run at room temperature due to the nature of the test equipment and facilities - the response of the product could be different when cold or hot than at room temperature. Another limitation is that very repeatable@ accurate and idealized signals are used to represent the ""real world"". While this would appear to be desirable@ it is not necessarily the case. The ""real world"" contains randomness and other characteristics (e.g.@ complex impedances) not replicated by such idealized test signals. Randomness is extremely critical for a microprocessor type DUT since the stress event (e.g.@ transients) must often line up in time with a certain point(s) in software execution to have an effect. It is important to note that many of these tests are not the ""test for success"" type where the results are classified as either pass or fail. Such testing is of limited value since it generates little information. The goal is to generate variable data or anomalies so that the maximum amount of information is obtained and an informed engineering judgement can be made."

SAE J2628-2018由SAE - SAE International 发布于 2018-06-01，并于 2018-06-15 实施。

SAE J2628-2018的历代版本如下：

• 2002年08月01日 SAE J2628-2002
• 2005年04月01日 SAE J2628-2005 SAE J 2628-2005
• 2007年07月01日 SAE J2628-2007 SAE J 2628-2007
• 2013年07月16日 SAE J2628-2013 抗传导干扰度的特性
• 2018年06月01日 SAE J2628-2018 SAE J 2628-2018

标准号

SAE J2628-2018

发布日期

2018年06月01日

实施日期

2018年06月15日

废止日期

无

中国标准分类号

/

国际标准分类号

/

发布单位

SAE - SAE International

引用标准

19

适用范围

"The methods included in this document are: a. Voltage-Temperature Design Margins. b. Voltage Interruptions and Transients. c. Voltage Dropouts and Dips. d. Current Draw Under a Number of Conditions. e. Switch Input Noise These methods are best applied during the Development stage but can be used at all stages (e.g.@ Pre-Qualification@ Qualification or Conformity). Measurement Philosophy The main issues associated with contemporary mature electronic systems (non mechanical) are: a. Requirements not properly defined (e.g.@ functionality@ environment). b. System interfaces. c. Trouble Not Indicated (TNI). A typical validation test program may not sufficiently address these issues. Some common deficiencies are: a. Requirements validation - tested under ideal conditions (e.g.@ room temp@ bench power supply). b. Environmental (non EMC) testing mainly wear-out oriented. c. EMC testing not realistic - room temp only@ idealized noise signals. d. System interactions@ interfaces and degradation not sufficiently addressed. This document addresses much of the above using relatively simple and low cost techniques which: a. Requires minimal lab facilities. b. Allows maximum flexibility to experiment early in the program. c. Allows sufficient reaction time to react to potential issues. d. Stage where failures are good (maximizes information). One main issue addressed here is Conducted Immunity (CI). That aspect of Electromagnetic Compatibility (EMC) has the highest potential for warranty and customer satisfaction issues. However@ traditional validation testing for CI has major limitations. Specifically@ CI testing is most often run at room temperature due to the nature of the test equipment and facilities - the response of the product could be different when cold or hot than at room temperature. Another limitation is that very repeatable@ accurate and idealized signals are used to represent the ""real world"". While this would appear to be desirable@ it is not necessarily the case. The ""real world"" contains randomness and other characteristics (e.g.@ complex impedances) not replicated by such idealized test signals. Randomness is extremely critical for a microprocessor type DUT since the stress event (e.g.@ transients) must often line up in time with a certain point(s) in software execution to have an effect. It is important to note that many of these tests are not the ""test for success"" type where the results are classified as either pass or fail. Such testing is of limited value since it generates little information. The goal is to generate variable data or anomalies so that the maximum amount of information is obtained and an informed engineering judgement can be made."