This specification describes a serialized interface between data converters and logic devices. It contains
normative information to enable designers to implement devices that communicate with other devices
covered by this specification. Informative annexes are included to clarify and exemplify the specification.
Due to the range of applications involved, the intention of the document is to completely specify only the
serial data interface and the link protocol. Certain signals common to both the interface and the function
of the device, such as source clocks and control interfaces, have application-dependent requirements.
Devices may also have application-dependent modes, such as a low power / shutdown mode, that will
affect the interface. In these instances, the specification merely constrains other device properties as they
relate to the interface, and leaves the specific implementation up to the designer.
This version of the standard supports serial data interfaces consisting of single or multiple lanes per
converter device. In addition, converter functionality (ADC or DAC) can be distributed over multiple
devices:
? All parallel running devices are implemented or specified to run synchronously with each other using
the same data format.
? Normally this means that they are part of the same product family.