35.160 微处理机系统 标准查询与下载

ANSI/IEEE 1101.10:1996 使用IEEE标准1101.1-1991设备实施规程的微型电子计算机用附加机械规范标准

Specifies dimensions which will ensure the mechanical and "Requirements and Tests of Environmental Conditions for Structures for Electronic Equipment" interchangeability of subracks and plug-in units, based on IEEE Std 1101.1, IEC 297-3, IEC 297-4, using IEC 603-2 based connectors and IEC 48D/1587-1 and IEC 48D/1587-3 requirements.

Standard for Additional Mechanical Specifications for Microcomputers Using the IEEE Std 1101.1-1991 Equipment Practice

ANSI/VITA 6.1-1996 ANSI/VITA 6-1994信号计算系统总体结构的扩展

This document contains extensions to ANSI/VITA 6, SCSA. The extensions provide various forward and backward compatible options that provide both added bearer capacity and higher availability.

Extensions to ANSI/VITA 6-1994 Signal Computing System Architecture

ISO/IEC 14536:1995 信息技术 微处理机系统 未来总线+TM、轮廓M(军用)

Information technology - Microprocessor systems - Futurebus+<(hoch)TM>, Profile M (military)

ARMY MIL-C-51326 NOTICE 1-1995 M4A1型核裂变产额计算器

This commercial item description covers brown kraft paper used for general wrapping applications.

CALCULATOR, NUCLEAR YIELD, M4A1

BS ISO/IEC 13213:1995 信息技术.微处理器系统.微型计算机总线控制和状态寄存器(CSR)体系机构

Defines the address-space maps, the bus transaction sets, and the node's CSRs. Includes the format and content of the configuration ROM on the node providing the parameters necessary to autoconfigure systems with nonprocessor nodes provided by multiple vendors. The annexes provide background for understanding the usage of this CSR Archtecture specification.

Information technology - Microprocessor systems - Control and Status Registers (CSR) Architecture for microcomputer buses

BS ISO/IEC 10861:1995 信息技术.微处理器系统.高性能同步32位总线:多总线Ⅱ

Defines the operation, functions, and attributes of the IEEE 1296 bus standard. Defines a high-performance 32-bit synchronous bus standard. Intended for general purpose applications to optimize block transfers, including protocol for message passing. Intended to support multiple processor modules in a functionally partitioned configuration and heterogeneous processor types in the same system and heterogeneous processor types in the same system.

Information technology - Microprocessor systems - High-performance synchronous 32-bit bus: MULTIBUS II

SJ 20505-1995 无线调制解调器通用规范

Generic specification for wireless modem

SJ 20521-1995 军用便携式计算机通用规范

General specification for military portable computer

GOST R ISO/IEC 10857-1995 信息技术.微处理机系统.Futurebus+连接器.逻辑协议规范

Настоящий стандарт регламентирует логический (относящийся к временным соотношениям и протоколу поведения) уровень, определяющий набор с

Information technology. Microprocessor systems. Futurebus+. Logical protocol specification

GOST R 50747-1995 工业设备电磁兼容性 电子收银机 试验要求和方法

Electromagnetic compatibility of technical equipment. Electronic cash registers. Technical requirements and test methods

IEEE 896.4A-1995 未来总线一致性试验要求.错误、修正和澄清

Conformance test requirements for Futurebus+; errata, corrections, and clarifications

ANSI/VITA 3-1995 VME总线用板式台面活动插接件

Advances in technology allow smaller board sizes to perform the functionality that a few years ago required a larger board. Alternatively, these advances allow increased functionality on the same sized boards. Thus, VMEbus boards and system designs are greatly increasing in capability. Where once a radio room had six separate chassis containing one radio each, that radio room today has one chassis housing six radios. This size reduction has created the demand for highly reliable and easily maintainable systems. The Telecommunications and Defense applications require a more fault tolerant, live insertable VMEbus. Currently, live insertion and extraction is not supported by the IEEE 1014 VMEbus standard. The VMEbus and Futurebus+ Extended Architectures International Trade Association (VITA) has responded by forming the Recommended Practices Guide to Board Level Live Insertion for the VMEbus Working Group to examine solutions for a Board Level Live Insertable VMEbus. This document recommends practices to implement board level live insertion with existing VMEbus boards.

Board Level Live Insertion for VMEbus

IEEE Std 896.9-1994 futurebus+TM 架构容错扩展的 IEEE 标准

This document contains the specification for functions needed to implement a fault tolerant Futurebus+ backplane.

IEEE Standard for fault tolerant extensions to the futurebus+TM architecture

IEEE Std 896.5a-1994 IEEE futurebus+ TM 标准，配置文件 M（军用）：勘误表、更正和说明

This standard describes and specifies the physical layer required for military applications.

IEEE Standard for futurebus+ TM,profile M(Military):Errata,correction,and clarifications

IEEE Std 1014.1-1994 IEEE futurebus+TM/VME64 桥接标准

This standard defines the logical interface for interconnecting systems based on Futurebus+ and VME64 in a tightly coupled configuration. Such an interconnect is called a Bridge.

IEEE Standard for futurebus+TM/VME64 Bridge

IEEE 1212-1994 信息技术.微处理系统.控制与状态寄存器(CSR).微机总线结构

Information technology - Microprocessor systems - Control and Status Registers (CSR) Architecture for microcomputer buses

ISO/IEC 13213:1994 信息技术.微处理机系统.微处理机总线的控制和状态登记(CSR)体系结构

Defines the address-space maps, the bus transaction sets, and the node's CSRs. Includes the format and content of the configuration ROM on the node providing the parameters necessary to autoconfigure systems with nonprocessor nodes provided by multiple vendors. The annexes provide background for understanding the usage of this CSR Archtecture specification.

Information technology - Microprocessor systems - Control and Status Registers (CSR) architecture for microcomputer buses

SJ/T 10529-1994 电子收款机通用技术条件

本标准规定了电子收款机的产品分类、技术要求、试验方法、检验规则，以及标志、包装、运输、贮存等内容。 本标准适用于电子收款机。

Generic specification for electronic cash register

ANSI/IEEE Std1296:1994 信息技术.微处理机系统.高性能同步32位总线:MULTIBUSⅡ

Information technology - Microprocessor Systems - High - performance synchronous 32-bit bus: MULTIBUS II

CNS 13383-1994 信息处理–单击决策表之规格

本标准适用于单击决策表基本格式之规定及相关定义，并附录推荐之准备法与使用规约。备考 1. 本标准系与在计算机信息系统文件的上下文中使用决策表有关，而与其它使用，如程序叙述的表示法无关。2. 「多击」决策表之准备与使用的格式与规约不在本标准之适用范围内。

Information Processing - Specification of Single - Hit Decision Tables