JEDEC JEP150-2005
组装的固态表面贴装元件的测试驱使鉴定和故障机理分析

Stress-Test-Driven Qualification of and Failure Mechanisms Associated with Assembled Solid State Surface- Mount Components

JEDEC JEP150-2005 发布历史

The present solid state component level qualification procedures do not always ensure that the packaged component will operate reliably after assembly on printed wire boards (PWBs), or the like, since the free standing device level qualification may not induce the same thermomechanical stresses present in the post second level assembly state. As component interconnections decrease in size, e.g., the component is closer to the PWB; the interaction of the second level assembly becomes increasingly more likely on the component’s performance. This document demonstrates how to evaluate the effect of assembly level operations and structures on components. As such, this document pertains predominantly to the following set of solid state devices and component packages that are described in the Scope. Knowledge of and comparison with packaged component failure mechanisms and modes is needed between the free standing and the assembled state. To ensure an effective qualification methodology for this set of solid state surface-mounted components, testing shall be performed in both the free standing and assembled state, including attached heat sinks where applicable. It should be noted that peripheral leaded surfacemount components are not considered in this document because, in general, the thermomechanical stresses imparted to the component in its assembled state are minimal, due to the inherent flexibility of their leads.

JEDEC JEP150-2005由(美国)固态技术协会,隶属EIA US-JEDEC 发布于 2005-05-01。

JEDEC JEP150-2005 在中国标准分类中归属于: L97 加工专用设备。

JEDEC JEP150-2005的历代版本如下：

• 2005年05月01日 JEDEC JEP150-2005 组装的固态表面贴装元件的测试驱使鉴定和故障机理分析

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标准号

JEDEC JEP150-2005

发布日期

2005年05月01日

实施日期

废止日期

无

中国标准分类号

L97

发布单位

US-JEDEC

适用范围

The present solid state component level qualification procedures do not always ensure that the packaged component will operate reliably after assembly on printed wire boards (PWBs), or the like, since the free standing device level qualification may not induce the same thermomechanical stresses present in the post second level assembly state. As component interconnections decrease in size, e.g., the component is closer to the PWB; the interaction of the second level assembly becomes increasingly more likely on the component’s performance. This document demonstrates how to evaluate the effect of assembly level operations and structures on components. As such, this document pertains predominantly to the following set of solid state devices and component packages that are described in the Scope. Knowledge of and comparison with packaged component failure mechanisms and modes is needed between the free standing and the assembled state. To ensure an effective qualification methodology for this set of solid state surface-mounted components, testing shall be performed in both the free standing and assembled state, including attached heat sinks where applicable. It should be noted that peripheral leaded surfacemount components are not considered in this document because, in general, the thermomechanical stresses imparted to the component in its assembled state are minimal, due to the inherent flexibility of their leads.