L40 半导体分立器件综合 标准查询与下载

DLA SMD-5962-91519 REV C-2007 硅单块 高速操作放大器,双精密结型场效应晶体管,直线式微型电路

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN.

MICROCIRCUIT, LINEAR, DUAL PRECISION JFET, HIGH SPEED OPERATIONAL AMPLIFIER, MONOLITHIC SILICON

DLA SMD-5962-87663 REV F-2007 硅单块 带晶体管-晶体管逻辑电路兼容输入和三态输出的八进制接收器,高级互补金属氧化物半导体,数字微型电路

This drawing documents two product assurance class levels consisting of high reliability (device classes M, B,and Q) and space application (device classes S and V).

MICROCIRCUIT, DIGITAL, ADVANCED CMOS, OCTAL TRANSCEIVER WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON

JEDEC JESD99B-2007 微电子设备的术语.定义和字母符号

A term used to refer a characteristic to the positive end of the transfer diagram, that is, to the step whose nominal midstep [step] value has the most positive value. (See figures 2.5-3b and 2.5-3c.)

Terms, Definitions, and Letter Symbols for Microelectronic Devices

JEDEC JESD94.01-2007 在测试方法学基础上使用知识的应用特别规范.略微改动JESD94.2004年1月

The solid state component industry manufactures devices that are used in a wide range of applications. Consequently, the accelerated stress portion of the qualification regimen used to assess the reliability performance of these devices should be customized to match the range of end use applications, based upon knowledge of the customer’s end use application conditions, environment, life time requirements, potential failure mechanisms, and associated failure models. The practice of using prescribed reliability stress test conditions, durations, sample sizes, and acceptance criteria may be inappropriate, especially with the ever-evolving applications and material sets found in the solid state component industry. The historically prescribed stress tests may either produce false failures or not accelerate valid failure mechanisms because the stress conditions do not correlate appropriately to the actual use environment.

Application Specific Qualification Using Knowledge Based Test Methodology Minor Revision of JESD94, January 2004

JEDEC JESD22-B115-2007 焊接球张力

This document describes a test method only; acceptance criteria and qualification requirements are not defined. This test method applies to solder ball pull force testing prior to end-use attachment. Solder balls are pulled individually using mechanical jaws; force and failure mode data are collected and analyzed. Other specialized solder ball pull methods using a heated thermode, gang pulling of multiple solder joints, etc., are outside the scope of this document. Both low and high speed testing are covered by this document.

Solder Ball Pull

DLA SMD-5962-86876 REV B-2007 硅单块 升值或降值计数器,低功率肖脱基晶体管-晶体管逻辑电路,数字微型电路

This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.

MICROCIRCUIT, DIGITAL, LOW POWER SCHOTTKY TTL, UP/DOWN COUNTER, MONOLITHIC SILICON

DLA SMD-5962-86719 REV A-2007 硅单块 D型自动记录机器低功率肖特基晶体管-晶体管逻辑电路数字微型电路

This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.

MICROCIRCUIT, DIGITAL, LOW POWER SCHOTTKY TTL, QUAD D-TYPE REGISTER MONOLITHIC SILICON

DLA SMD-5962-86708 REV A-2007 硅单块高速注册,肖特基晶体管-晶体管逻辑电路,数字微型电路

This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.

MICROCIRCUIT, DIGITAL, LOW POWER SCHOTTKY TTL, HIGH SPEED REGISTER, MONOLITHIC SILICON

DLA SMD-5962-86075 REV C-2007 硅单块 移动装置,高级肖脱基晶体管-晶体管逻辑电路,数字微型电路

This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.

MICROCIRCUIT, DIGITAL, ADVANCED SCHOTTKY TTL, SHIFTER, MONOLITHIC SILICON

DLA SMD-5962-87525 REV F-2007 硅单块 晶体管-晶体管逻辑电路兼容输入,带预设置和清除的双D型双稳态多谐振荡器触发器,高级互补金属氧化物半导体 数字微型电路

This drawing documents two product assurance class levels consisting of high reliability (device classes M, B and Q) and space application (device classes S and V).

MICROCIRCUIT, DIGITAL, ADVANCED CMOS, DUAL D-TYPE FLIP-FLOP WITH PRESET AND CLEAR, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON

DLA SMD-5962-95712 REV A-2007 双极互补金属氧化物半导体三状态输出9-BIT母线接口D类闭锁装置,晶体管兼容输入硅单片电路线型微电路

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M)and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN.

MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, 9-BIT BUS INTERFACE D-TYPE LATCH WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON

IEC 60191-6-16:2007 半导体器件的机械标准化.第6-16部分:半导体试验术语表和BGA、LGA、FBGA和FLGA用老化插座

This part of IEC 60191 gives a glossary of semiconductor sockets for BGA, LGA, FBGA and FLGA. This standard intends to establish definitions and unification of terminology relating to tests and burn-in sockets for BGA, LGA, FBGA and FLGA.

Mechanical standardization of semiconductor devices - Part 6-16: Glossary of semiconductor tests and burn-in sockets for BGA, LGA, FBGA and FLGA

DLA SMD-5962-90854 REV H-2007 晶体管输出光耦合器单一沟道直线式混合微型电路

This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation hardness assurance levels are reflected in the PIN.

MICROCIRCUIT, HYBRID, LINEAR, SINGLE CHANNEL, OPTOCOUPLER, TRANSISTOR OUTPUT

DLA QML-19500-31-2007 半导体器件.一般规格

This apccification covers one type of cornercimi 6-cyUnder, V-type, liquid-cooled, 2-stroke-cycle, turbo-charged internal-combustion, com- 3 preselon ignition engine for use In m i l i t a r y veXlcles.

SEMICONDUCTOR DEVICES, GENERAL SPECIFICATION FOR

DLA SMD-5962-96813 REV A-2007 互补金属氧化物半导体,六角倒相施密特触发器,晶体管输入硅单片电路数字微电路

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

MICROCIRCUIT, DIGITAL, ADVANCED CMOS, HEX INVERTER SCHMITT TRIGGER, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON

DLA SMD-5962-89776 REV B-2007 硅单片,四重NPN晶体管阵列,高速线性微型电路

This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.

MICROCIRCUIT, LINEAR, FAST QUAD NPN TRANSISTOR ARRAY, MONOLITHIC SILICON

DLA SMD-5962-99532 REV A-2007 微型电路,数字型,双极,低功率肖特基晶体管晶体管逻辑电路,10位计算器,单块硅

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

MICROCIRCUIT, DIGITAL, BIPOLAR, LOW POWER SCHOTTKY TTL, 10-BIT COUNTER, MONOLITHIC SILICON

DLA SMD-5962-98627 REV A-2007 微型电路,线型,双极改进型肖特基晶体管晶体管逻辑电路,带清零信号和预置信号的双路正边沿触发D型触发器,单块硅

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M)and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY, TTL, DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS W/CLEAR AND PRESET, MONOLITHIC SILICON

JEITA EDR-4704A-2007 半导体器件用加速寿命试验的应用指南

Recent progresses in science and technology have brought electronic devices closer to our daily life. With respect to the lifecycles of the electronic products, some are expected to have longer life in the important applications, whereas others are used for shorter periods of life. It is remarkable how semiconductor?application marketplaces have expanded and diversified these days. For example, there are handheld terminals which are prone to be replaced frequently, such as cellphones. On the other hand, there are electronic devices which are required long-life durability in the harsh conditions, such as electronic components for automotives. Most of these electronic products comprise a large number of semiconductor devices without exception. Consisting of many materials (silicon, oxide layers, metal trace materials, dielectrics, etc.) as well as more than one billion transistors and even larger number of contacts, the semiconductor devices including packages that accommodate dice have grown into enormously large-scale systems. The evolution of the semiconductor technology includes the improvement of traces and dielectric layers such as very thin gate dielectric, high-k materials, and Cu/low-k materials, as well as high density packaging technologies including SiP and build-up substrates. Significant progress has been made toward finer patterns, higher integration, higher speed, and less power consumption. The reliability requirements for such complex larger-scale systems are the same as those for the conventional devices or even stringent. In comparison with the mechanical components, the semiconductor devices generally indicate higher reliability. Still the appropriate reliability assurance plans are required in accordance with the applications and purposes of the devices. On the other hand, the bases of the reliability criteria are not always technically tangible, even though its stress duration or number of stress cycles has already been specified in the qualification program. One of the examples is the stress duration of 1000 hours at the high temperature operation life test or the temperature humidity bias test. The acceleration test is intended to predict and verify the reliability level. For that purpose, the appropriate acceleration is estimated from the target failure mechanism. Then the relevant test time or stress cycles are determined based on the acceleration factor between the test conditions and the use conditions. As a result of this consideration, the test time or test cycles are in some cases reduced significantly, quite unlike common sense. The failure mechanisms in the accelerated stress test can be classified into either intrinsic mode or extrinsic mode.

Application guide of the accelerated life test for semiconductor devices

IEC 62374:2007 半导体器件.栅极介电薄膜用时间相关的电介质击穿(TDDB)试验

This International Standard provides a test method of Time Dependent Dielectric Breakdown (TDDB) for gate dielectric films on semiconductor devices and a product lifetime estimation method of TDDB failure.

Semiconductor devices - Time dependent dielectric breakdown (TDDB) test for gate dielectric films