This standard establishes the procedure for testing@ evaluating@ and classifying devices and microcircuits according to their susceptibility (sensitivity) to damage or degradation by exposure to a defined field-induced charged device model (CDM) electrostatic discharge (ESD). All packaged semiconductor devices@ thin film circuits@ surface acoustic wave (SAW) devices@ optoelectronic devices@ hybrid integrated circuits (HICs)@ and multi-chip modules (MCMs) containing any of these devices are to be evaluated according to this standard. To perform the tests@ the devices must be assembled into a package similar to that expected in the final application. This CDM document does not apply to socketed discharge model testers. This test method combines the main features of JEDEC JESD22-C101 and ANSI/ESD S5.3.1. New verification procedures and test condition definitions have been introduced to facilitate this combination. Purpose The purpose (objective) of this standard is to establish a test method that will replicate CDM failures and provide reliable@ repeatable CDM ESD test results from tester to tester@ regardless of device type. Repeatable data will allow accurate classifications and comparisons of CDM ESD sensitivity levels.