L40 半导体分立器件综合 标准查询与下载



共找到 1197 条与 半导体分立器件综合 相关的标准,共 80

This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.

MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED LOW-POWER SCHOTTKY, TTL, MULTIPLEXERS, MONOLITHIC SILICON

ICS
31.080.01
CCS
L40
发布
2005-08-17
实施

This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.

MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY, TTL, BUS TRANSCEIVERS WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON

ICS
31.080.01
CCS
L40
发布
2005-08-17
实施

This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.

MICROCIRCUIT, DIGITAL, BIPOLAR, LOW-POWER SCHOTTKY, TTL, MULTIPLEXER, MONOLITHIC SILICON

ICS
31.080.01
CCS
L40
发布
2005-08-17
实施

This part of IEC 62258 has been developed to facilitate the production, supply and use of semiconductor die products, including - wafers, - singulated bare die, - die and wafers with attached connection structures, - minimally or partially encapsulated die and wafers. This standard defines the minimum requirements for the data which are needed to describe such die products and is intended as an aid in the design of and procurement of assemblies incorporating die products. It covers the requirements for data, including - product identity, - product data, - die mechanical information, - test, quality, assembly and reliability information, - handling, shipping and storage information. This standard covers the specific requirements for data needed to describe the geometrical properties of die, their physical properties and the means of connection necessary for their use in the development and manufacture of products. It also contains, in Annexes A and B, terminology and a list of common acronyms, respectively.

Semiconductor die products - Part 1: Requirements for procurement and use

ICS
31.080.01
CCS
L40
发布
2005-08
实施
2009-04-10

This drawing documents three product assurance class levels consisting of high reliability (device classes Q andM), space application (device class V) and for appropriate satellite and similar applications (device class T). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. For device class T, the user is encouraged to review the manufacturer’s Quality Management (QM) plan as part of their evaluation of these parts and their acceptability in the intended application.

MICROCIRCUIT, DIGITAL, RADIATION HARDENED, HIGH SPEED CMOS, DUAL D FLIP-FLOP WITH SET AND RESET, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON

ICS
31.080.01
CCS
L40
发布
2005-07-26
实施

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN.

MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY TTL, OCTAL D-TYPE, MONOLITHIC SILICON

ICS
31.080.01
CCS
L40
发布
2005-07-20
实施

Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V).

MICROCIRCUIT, DIGITAL, RADIATION HARDENED, ADVANCED CMOS, TRIPLE 3-INPUT NAND GATE, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON

ICS
31.080.01
CCS
L40
发布
2005-06-28
实施

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M)and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

MICROCIRCUIT, DIGITAL, RADIATION HARDENED, ADVANCED CMOS, TRIPLE 3-INPUT AND GATE, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON

ICS
31.080.01
CCS
L40
发布
2005-06-28
实施

Standard Test Interface Language (STIL) provides an interface between digital test generation tools and test equipment. Extensions to the test interface language are defined that a) facilitate the use of the language in the design environment and b) facilitate the use of the language for large designs encompassing sub-designs with reusable patterns.

IEEE Standard for Extensions to Standard Test Interface Language (STIL) (IEEE Std 1450?999) for Semiconductor Design Environments IEEE Computer Society Document; Errata:12/20/2005

ICS
35.060
CCS
L40
发布
2005-06-09
实施

Semiconductor devices - Mechanical and climatic test methods - Part 30 : preconditioning of non-hermetic surface mount devices prior to reliability testing.

ICS
31.080.01
CCS
L40
发布
2005-06-01
实施
2005-06-05

This part of IEC 62258 has been developed to facilitate the production, supply and use of semiconductor die products, including but not limited to - singulated bare die, - minimally or partially encapsulated die and wafers. This standard specifies the da

Semiconductor die products - Part 2: Exchange data formats

ICS
31.200
CCS
L40
发布
2005-06
实施
2011-05-27

This technical report has been developed to facilitate the production, supply and use of semiconductor die products, including: - singulated bare die, - minimally or partially encapsulated die and wafers. This report contains suggested good practice for

Semiconductor die products - Part 3: Recommendations for good practice in handling, packing and storage

ICS
31.200
CCS
L40
发布
2005-06
实施

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN).

MICROCIRCUIT, DIGITAL, ADVANCED CMOS, OCTAL TRANSPARENT LATCH WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON

ICS
31.080.01
CCS
L40
发布
2005-05-25
实施

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M)and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

MICROCIRCUIT, DIGITAL, ADVANCED CMOS, OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON

ICS
31.080.01
CCS
L40
发布
2005-05-10
实施

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

MICROCIRCUIT, DIGITAL, ADVANCED CMOS, DUAL 1-OF-4 DECODER/DEMULTIPLEXER, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON

ICS
31.080.01
CCS
L40
发布
2005-03-14
实施

This drawing describes the requirements for NPN, silicon, high-power transistors.

SEMICONDUCTOR DEVICE, TRANSISTOR, NPN, SILICON, HIGH POWER TYPE 2N5926

ICS
31.080.01
CCS
L40
发布
2005-03-14
实施

Mechanical standardization of semiconductor devices - Part 6 : general rules for the preparation of outline drawings of surface mounted semiconductor device packages.

ICS
01.100.25;31.240
CCS
L40
发布
2005-03-01
实施
2005-03-05

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V).

MICROCIRCUIT, DIGITAL, ADVANCED CMOS, OCTAL D-TYPE FLIP-FLOP, TTL COMPATIBLE INPUTS, THREE-STATE OUTPUTS, MONOLITHIC SILICON

ICS
31.080.01
CCS
L40
发布
2005-02-22
实施

This part of IEC 60191 gives general rules for the preparation of outlines drawings of surface-mounted semiconductor devices. It supplements IEC 60191-1 and 60191-3. It covers all surface-mounted devices-discrete semiconductors as well as integrated circuits classified as form E in Clause 3 of IEC 60191-4.

Mechanical standardization of semiconductor devices-Part 6:General rules for the preparation of outline drawings of surface mounted semiconductor device packages

ICS
01.100.25;31.240
CCS
L40
发布
2005-02-18
实施
2005-02-18

This part of IEC 60191 gives general rules for the preparation of outlines drawings of surfacemounted semiconductor devices. It supplements IEC 60191-1 and 60191-3. It covers all surfacemounted devices-discrete semiconductors as well as integrated circuits classified as form E in Clause 3 of IEC 60191-4.

Mechanical standardization of semiconductor devices - General rules for the preparation of outline drawings of surface mounted semiconductor device packages

ICS
01.100.25;31.240
CCS
L40
发布
2005-02-18
实施
2005-02-18



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