L43 半导体整流器件 标准查询与下载

IEC 61954:2011 静止无功补偿器(SVC).晶闸管阀的试验

This International Standard defines type@ production and optional tests on thyristor valves used in thyristor controlled reactors (TCR)@ thyristor switched reactors (TSR) and thyristor switched capacitors (TSC) forming part of static VAR compensators (SVC) for power system applications. The requirements of the standard apply both to single valve units (one phase) and to multiple valve units (several phases). Clauses 4 to 7 detail the type tests@ i.e. tests which are carried out to verify that the valve design meets the requirements specified. Clause 8 covers the production tests@ i.e. tests which are carried out to verify proper manufacturing. Clauses 9 and 10 detail optional tests@ i.e. tests additional to the type and production tests.

Static VAR compensators (SVC) - Testing of thyristor valves

IEC TR 60146-1-2:2011 半导体转换器.一般要求和电网整流转换器.第1-2部分:应用指南

This part of IEC 60146 gives guidance on variations to the specifications given in IEC 60146-1-1:2009 to enable the specification to be extended in a controlled form for special cases. Background information is also given on technical points which should facilitate the use of IEC 60146-1-1:2009. This technical report primarily covers line commutated converters and is not in itself a specification, except as regards certain auxiliary components, in so far as existing standards may not provide the necessary data.

Semiconductor converters - General requirements and line commutated converters - Part 1-2: Application guide

IEC 60146-1-1:2009 半导体变流器.总要求和线路整流转换器.第1-1部分:基本要求规范

Scope and objectThis International Standard specifies the requirements for the performance of all electronic power convertors and electronic power switches using controllable and/or non-controllable electronic valves.The electronic valves mainly comprise semiconductor devices@ ?.e. diodes and various types of thyristors and transistors@ such as reverse blocking or conducting thyristors@ turn-off thyristors@ triacs and power transistors. The devices may be controlled by means of current@ voltage or light. Non-bistable devices are assumed to be operated in the switched mode.This standard is primarily intended to specify the requirements applicable to line commutated convertors for conversion of a.c. power to d.c. power or vice versa. Parts of this standard are applicable also to other types of electronic power convertors and should be regarded as a standard for them in so far as it is not in contradiction to additional IEC Standards for particular types of semiconductor convertors given in existing or future IEC Publications.These specific equipment requirements are applicable to semiconductor power convertors that either implement different types of power conversion or use different types of commutation (for example semiconductor self-commutated convertors) or involve particular applications (for example semiconductor convertors for d.c. motor drives) or include a combination of said characteristics (for example direct d.c. convertors for electric rolling stock).The main purposes of this standard are as follows:Part 1 -1@ IEC 146-1 -1@ Specifications of basic requirements.- to establish basic terms and definitions;- to specify service conditions which influence the basis of rating;- to specify test requirements for complete convertor equipment and assemblies@ standard design@ (for special design see IEC 146-1-2);- to specify basic performance requirements;- to give application oriented requirements for semiconductor power convertors.Part 1-2@ IEC 146-1-2@ Application guide- to give additional information on test conditions and components@ (for example: semiconductor devices)@ when required for their use in semiconductor power con- vertors@ in addition to or as a modification on existing standards;- to provide useful reference@ calculation factors@ formulae and diagrams pertaining to power convertor practice.Part 1-3@ IEC 146-1-3@ Transformers and reactors- to give additional information on characteristics wherein convertor transformers differ from ordinary power transformers. In all other respects@ the rules specified in IEC 76@ shall apply to convertor transformers@ as far as they are not in contradiction with this standard.

Semiconductor converters - General requirements and line commutated converters - Part 1-1: Specification of basic requirements

IEC 60700-1:2008 高压直流电(HVDC)电力传输用晶闸管阀.第1部分:电测试

This standard applies to thyristor valves with metal oxide surge arresters directly connected between the valve terminals, for use in a line commutated converter for high voltage d.c. power transmission or as part of a back-to-back link. It is restricted to electrical type and production tests. The tests specified in this standard are based on air insulated valves. For other types of valves, the test requirements and acceptance criteria must be agreed.

Thyristor valves for high voltage direct current (HVDC) power transmission - Part 1: Electrical testing

IEC 60700-1:1998/AMD2:2008 高压直流电(HVDC)电力传输用半导体闸流管阀.第1部分:电气测试

This amendment has been prepared by subcommittee 22F: Power electronics for electrical transmission and distribution systems, of IEC technical committee 22: Power electronic systems and equipment. The text of this amendment is based on the following documents: Full information on the voting for the approval of this amendment can be found in the report on voting indicated in the above table. The committee has decided that the contents of this amendment and the base publication will remain unchanged until the maintenance result date indicated on the IEC web site under "http://webstore.iec.ch" in the data related to the specific publication. At this date, the publication will be reconfirmed. ~ reconfirmed, ~ withdrawn, ~ replaced by a revised edition, or ~ amended.

Thyristor valves for high-voltage direct current (HVDC) power transmission - Part 1: Electrical testing

JEDEC JESD82-24-2007 SSTUB32865的定义 DDR2 RDIMM应用软件28位1:2注册缓冲器加奇偶校验

This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTUB32865 registered buffer with parity for 2 rank by 4 or similar highdensity DDR2 RDIMM applications. The SSTUB32865 is identical in functionality to the SSTU32865 but specifies tighter timing characteristics and a higher application frequency of up to 410MHz.

Definition of the SSTUB32865 for DDR2 RDIMM Applications 28-bit 1:2 Registered Buffer with Parity

JEDEC JESD82-9B-2007 SSTU32865的定义 2R x 4 DDR2 RDIMM应用软件的注册缓冲器加奇偶校验

This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTU32865 registered buffer with parity for 2 rank by 4 or similar highdensity DDR2 RDIMM applications.

Definition of the SSTU32865 Registered Buffer with Parity for 2R ?4 DDR2 RDIMM Applications

JEDEC JESD82-23-2007 SSTUB32S869和SSTUA32D869的定义 DDR2 RDIMM应用软件注册缓冲器加奇偶校验

This standard defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the SSTUA32S869 and SSTUA32D869 registered buffer with parity for driving heavy load on high-density DDR2 RDIMM applications. A typical application would be a 36 SDRAM planar DIMM. The SSTUA32S869 and SSTUA32D869 are identical in functionality to the SSTU32S869 and SSTU32D869 devices respectively but specify tighter timing characteristics and a higher application frequency of up to 410MHz.

Definition of the SSTUA32S869 and SSTUA32D869 DDR2 RDIMM Applications Registered Buffer with Parity for

JEDEC JESD82-26-2007 SSTUB32868的定义 2Rx4DDR2 RDIMM应用软件的注册缓冲器的单双校验

Definition of the SSTUB32868 Registered Buffer with Parity for 2R x 4 DDR2 RDIMM Applications

Definition of the SSTUB32868 Registered Buffer with Parity for 2R x 4 DDR2 RDIMM Applications

JEDEC JESD82-25-2007 SSTUB32866的定义 4DDR2 RDIMM应用软件1.8V可配置的注册缓冲器加奇偶校验测试

This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTUB32866 registered buffer with parity test for DDR2 RDIMM applications.

Definition of the SSTUB32866 1.8 V Configurable Registered Buffer with Parity Test for DDR2 RDIMM Applications

JEDEC JESD82-10A-2007 SSTU32866的定义 DDR2 RDIMM应用软件28位1:2注册缓冲器加奇偶校验测试

This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTU32866 registered buffer with parity test for DDR2 RDIMM applications.

Definition of the SSTU32866 1.8 V Configurable Registered Buffer with Parity Test for DDR2 RDIMM Applications

JEDEC JESD82-27-2007 SSTUB32869的定义 DDR2 RDIMM注册的应用缓冲器的单双校验

This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTUB32868 registered buffer with parity test for DDR2 RDIMM applications.

Definition of the SSTUB32869 Registered Applications Buffer with Parity for DDR2 RDIMM

JEDEC JESD82-16A-2007 SSTUB32866的定义 DDR2 RDIMM应用软件28位1:2注册缓冲器加奇偶校验测试

This 25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity is designed for 1.7 V to 1.9 V VDD operation.

Definition of the SSTUA32866 1.8 V Configurable Registered Buffer with Parity Test for DDR2 RDIMM Applications

JEDEC JESD82-19A-2007 SSTUA32S865的定义 DDR2 RDIMM应用软件 注册的缓冲器加奇偶校验和SSTUA32D865 28位1:2

This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTUA32S865 and SSTUA32D865 registered buffer with parity for 2 rank by 4 or similar high-density DDR2 RDIMM applications.

Definition of the SSTUA32S865 DDR2 RDIMM Applications Registered Buffer with Parity for and SSTUA32D865 28-bit 1:2

JEDEC JESD82-12A-2007 SSTU32S869和SSTU32D869的定义 DDR2 RDIMM应用软件的注册缓冲器加奇偶校验

This standard defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the SSTU32S869 and SSTU32D869 registered buffer with parity for driving heavy load on high-density DDR2 RDIMM applications. A typical application would be a 36 SDRAM planar DIMM.

Definition of the SSTU32S869 and SSTU32D869 Registered Buffer with Parity for DDR2 RDIMM Applications

JEDEC JESD82-20-2007 FBDIMM: 高级存储缓冲器(AMB)

This document is a core specification for a Fully Buffered DIMM (FBD) memory system. This document, along with the other core specifications, must be treated as a whole. Information critical to a Advanced Memory Buffer design appears in the other specifications, with specific cross-references provided.

FBDIMM: Advanced Memory Buffer (AMB)

JEDEC JESD74A-2007 半导体器件的早期寿命故障运价计算程序

Early life failure rate (ELFR) measurement of a product is typically performed during product qualifications or as part of ongoing product reliability monitoring activities. These tests measure reliability performance over the product’s first several months in the field. It is therefore important to establish a methodology that will accurately project early life failure rate to actual customer use conditions.

Early Life Failure Rate Calculation Procedure for Semiconductor Components

JEDEC JESD30D-2006 半导体器件封装的描述设计系统

This standard describes a systematic method for generating descriptive designators for semiconductor-device packages. The descriptive designator is intended to provide a useful communication tool, but has no implied control for assuring package interchangeability.

Descriptive Designation System for Semiconductor-device Packages

JEDEC JESD77B.01-2006 离散半导体和光离子器件的术语、定义以及字母符号 JESD77-B较小修订

In a few special cases, nonalphanumerical signs are considered as letters in this connection, e.g., the sign ° (degree), which is used as a letter symbol for a unit of angle and in the letter symbol °C for a unit of temperature.

Terms, Definitions, and Letter Symbols for Discrete Semiconductor and Optoelectronic Devices Minor Revision of JESD77-B

JEDEC JESD82-14A-2006 SSTUB32868的定义 DDR2 RDIMM应用软件28位1:2注册缓冲器加奇偶校验

This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTUB32868 registered buffer with parity test for DDR2 RDIMM applications. SSTU32S2868 denotes a single-die implementation and SSTU32D868 denotes a dual-die implementation.

Definition of the SSTUB32868 1.8 V Configurable Registered Buffer with Parity for DDR2 RDIMM Applications