共找到 221 条与 半导体分立器件 相关的标准,共 15 页
Accelerated tests are typically used to find and identify potential failure mechanisms in semiconductor devices and to estimate the rate of their occurrence in electronic systems. The historical approach to investigating the relationship between a maximum stress failure rate and a system failure rate is to choose a single representative "equivalent" thermal activation energy for a given product or product group. A single, best-estimate activation energy value facilitates accurate estimation of the acceleration factor for the device failure-rate estimation in the system application. While that approach has been generally accepted by the industry because of its simplicity and direct relationship to products, another method has been developed, the Sum-of-the-Failure-Rates method, that offers more knowledge of why devices fail.
Failure Mechanisms and Models for Silicon Semiconductor Devices
Soft errors are nondestructive functional errors induced by energetic ion strikes. Soft errors are a subset of single event effects (SEE), and include single-event upsets (SEU), multiple-bit upsets (MBU), singleevent functional interrupts (SEFI), single-event transients (SET) that, if latched, become SEU, and singleevent latchup (SEL) where the formation of parasitic bipolar action in CMOS wells induce a lowimpedance path between power and ground, producing a high current condition (SEL can also cause latent and hard errors).
Measurement and Reporting of Alpha Particle and Terrestrial Cosmic Ray-Induced Soft Errors in Semiconductor Devices
이 규격은 부착용 주석-납(SnPb) 또는 무연납(Pb-free)의 땜납을 이용하여 다른
Semiconductor devices-Mechanical and climatic test methods- Part 21:Solderability
Semiconductor devices. Mechanical and climatic test methods. Part 24: Accelerated moisture resistance. Unbiased HAST (IEC 60749-24:2004)
Semiconductor devices. Mechanical and climatic test methods - Part 33: Accelerated moisture resistance. Unbiased autoclave (IEC 60749-33:2004)
IEC 60747의 목적은 다음과 같다.-집적 회로뿐 아니라 개별 소자에도 일반적으로
Semiconductor devices-Discrete devices and integrated circuits-Part 1:General
TEST METHODS OF D.C. CRITICAL CURRENT OF Cu/Nb-Ti COMPOSITE SUPERCONDUCTORS
The penetration of semiconductor products into an increasing variety of application segments together with the economic forces of cost and time-to-market require efficient qualification concepts. This requirement influences the organization of the qualification process in conjunction with the development / innovation process as well as the qualification methodology. Proactive practices such as advance quality planning, "incremental qualification" and confirmation during development have to be practiced in order to meet time to market goals. Results of theses activities including the use of further available knowledge will be the basis for the qualification as evidence for the readiness of the product for the market.
Reliability Qualification of Semiconductor Devices Based on Physics of Failure Risk and Opportunity Assessment
Semiconductor discrete device Detail specification of type 3DK457 for power switching transistors
This publication identifies the general requirements for Distributors that supply Commercial and Military products. This specification applies to all discrete semiconductors, integrated circuits and Hybrids, whether packaged or in wafer/die form, manufactured by all Manufacturers
General Requirements for Distributors of Commercial and Military Semiconductor Devices
The handheld electronic products fit into the consumer and portable market segments. Included in the handheld electronic products are cameras, calculators, cell phones, pagers, palm size PCs, Personal Computer Memory Card International Association (PCMCIA) cards, smart cards, mobile phones, personal digital assistants (PDAs) and other electronic products that can be conveniently stored in a pocket and used while held in user’s hand.
Board Level Drop Test Method of Components for Handheld Electronic Products
General specification for microwave assembly
The following details, and those required by the specific test condition, shall be specified in the applicable procurement document
Lead Integrity
The purpose of this test is to measure the deviation of the terminals (leads or solder balls) from coplanarity for surface-mount semiconductor devices.
Coplanarity Test for Surface-Mount Semiconductor Devices
Mechanical standardization of semiconductor devices. Part 4: Coding system and classification into forms of package outlines for semiconductor device packages (IEC 60191-4:1999/A2:2002)
Semiconductor convertors. General requirements and line commutated convertors. Part 1-3: Transformers and reactors (IEC 60146-1-3:1991)
Generic specification. Discrete pressure contact power semiconductor devices (Qualification approval)
The purpose of this test is to determine the effectiveness of the seal of hermetically sealed solid-state devices.
Hermeticity
This Test Method covers the minimum requirements that should be in effect for the evaluation and acceptance of polymeric materials for use in industrial, military, space, and other specialcondition products which may require capabilities beyond standard commercial microelectronics applications. It is not the intent of this Publication to specify a material, but to evaluate the material to assure that the quality and reliability of the microelectronic devices are not compromised. These materials shall be classified in two types as follows
Test Methods and Acceptance Procedures for the Evaluation of Polymeric Materials [Replaced: JEDEC JEP105, JEDEC JEP107, JEDEC JEP112]
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